Nvidia Unveils NVQLink, Positioning Itself as a Key Partner in Quantum Computing
Key Takeaways
- •Nvidia launched NVQLink on October 28, 2025, as an open interconnect designed to connect quantum processing units to its GPU-accelerated supercomputersThe interconnect provides latency under 4 microseconds and throughput up to 400 Gb/s, integrates with Nvidia's CUDA-Q platform, and supports superconducting, trapped-ion, and photonic quantum hardware.
- •A Quantinuum Helios QPU linked to an Nvidia GH200 Grace Hopper Superchip performed real-time error-correction decoding 32 times faster than standard requirements, with a 67-microsecond reaction time and a 5.4-fold improvement in logical-qubit error rates for an 8-logical-qubit memory.
- •By November 17, 2025, more than a dozen supercomputing centers worldwide, including nine US national laboratories, had started working with NVQLink.
- •Nvidia has formed a coalition of 17 QPU builders and five controller vendors around the NVQLink standard, allowing the company to benefit regardless of which competing quantum hardware approach ultimately proves superior.
Nvidia unveiled NVQLink on October 28, 2025, introducing an open architecture interconnect designed to connect quantum processing units (QPUs) with the company's GPU-accelerated supercomputers. Chief Executive Jensen Huang framed the announcement in sweeping terms, comparing NVQLink to a “Rosetta Stone” for the interplay between quantum and classical computing.
What NVQLink Does
NVQLink delivers latency under 4 microseconds and throughput of up to 400 Gb/s between GPUs and QPUs, using RDMA over Ethernet. That latency target speaks to one of quantum computing's central engineering constraints: error correction only works when a classical system can decode measurement results and send corrections back to fragile qubits faster than errors can accumulate. The interconnect integrates with Nvidia's existing CUDA-Q software platform—the company's environment for programming hybrid quantum-classical workloads—and supports multiple quantum hardware approaches, including superconducting qubits, trapped-ion systems, and photonic architectures. Each connected NVQLink system can deliver up to 40 petaflops of AI performance at FP4 precision with sparsity.
Early benchmark results point to the interconnect's role in error correction. Quantinuum's Helios QPU, connected through NVQLink to an Nvidia GH200 Grace Hopper Superchip, carried out real-time quantum error correction decoding 32 times faster than standard requirements. The setup posted a reaction time of just67 microseconds and improved logical-qubit error rates by 5.4 times for an 8-logical-qubit memory.
Adoption Already Underway
By November 17, 2025—less than three weeks after the announcement—more than a dozen supercomputing centers worldwide had started working with NVQLink. Nine of those facilities are US national laboratories, which run some of the world's most demanding scientific computing workloads. Nvidia has also assembled a coalition of 17 QPU builders and five controller vendors around the NVQLink standard.
A Bet on Hybrid Systems
Nvidia's leadership has been explicit that future GPU supercomputers will be hybridized with quantum processors. By building the bridge rather than the quantum processor itself, the company avoids picking sides among competing quantum modalities: if superconducting qubits win, NVQLink works; if trapped ions prove superior, NVQLink works as well. How those early deployments perform, and whether the QPU-builder coalition grows beyond 17, will be the clearest near-term gauges of the hybrid strategy's progress.
