Microsoft has begun deploying systems powered by Cisco's Silicon One P200, a routing chip designed for one of the least glamorous yet most critical jobs in artificial intelligence: moving enormous volumes of data between data centers.

The chip was only unveiled on October 8, 2025. Seeing it running inside one of the world's largest cloud networks this soon indicates that hyperscalers were not waiting around to adopt it.

What the P200 Actually Does

Cisco describes the P200 as a deep-buffer routing processor. A buffer is a holding area where data waits briefly when traffic spikes, and a deeper buffer means fewer dropped packets when large volumes arrive at once.

That capability matters because AI traffic does not behave politely. Training and inference jobs tend to send data in bursts, and networks built for steadier workloads can choke on them. Links between data centers feel these bursts keenly, since they carry traffic aggregated from entire facilities rather than single cluster.

Cisco launched the P200 alongside its 8223 routing system. The headline specifications are:

• 51.2 Tbps of full-duplex throughput
• A compact 3RU form factor, meaning the system occupies three standard units of rack space
• 64 × 800G ports on the 8223 system
• Shared buffer technology, programmability, and integrated security features

Full-duplex means data flows in both directions at the same time, so the 51.2 Tbps figure covers traffic going out and coming back simultaneously.

Ninety-Two Chips Become One

According to Cisco, a single P200 performs the processing work that previously required 92 earlier-generation chips.

That shrinkage translates into power savings. Cisco says the new setup uses 65% less power than its previous 8804 system while delivering the same routing capacity. Because networking hardware runs around the clock, efficiency gains at the silicon level compound across large fleets, and lower power draw means less heat for a facility to manage.

Cisco is also pitching the P200 for what it calls "scale-across" architectures. In multi-layer topologies, the company says these designs could potentially reach up to 3 exabits per second.

Microsoft as an Early Believer

Microsoft is not a newcomer to Silicon One. The company has been an early adopter of the chip family and uses the architecture across several parts of its Azure networking stack. Those roles include data center networking, wide area networking—the long-haul links connecting facilities—and AI and machine learning applications.

Dave Maltz of Microsoft has stressed that networks need to get faster to handle the data bursts generated by AI workloads. He has also affirmed the company's early commitment to Silicon One.

Microsoft is not the only hyperscaler in line. Following the announcement, P200-powered systems began shipping to major cloud customers including Microsoft Azure and Alibaba.

On the software side, Cisco is trying to appeal to two camps. The P200 initially supports SONiC, an open-source network operating system that originated at Microsoft and is popular with large cloud operators, with plans to expand support to Cisco's own IOS XR.

Open Questions Remain

Several points are still unresolved. The 3 exabits per second figure describes a potential ceiling in multi-layer designs, not a demonstrated deployment. IOS XR support, meanwhile, remains a plan rather than a shipping feature—a detail that may matter to enterprise customers who are not running SONiC.